Energy-efficient truncated multipliers

摘要

Approximate computing is a promising approach in the design of low-power digital systems. There are two main approaches in approximate computing: the first relies on lowering the supply voltage level on specific computational blocks, while the second relies on completely truncating specific computational blocks. The second option is more aggressive; however, it is deterministic and leads to better energy savings. This paper, in accordance with the second option, presents a set of 8-bit combinational digital multipliers that provide an approximate product while reducing energy consumption by up to 57% while maintaining excellent results, as demonstrated by several image-processing applications.