MOS interface control of high mobility channel materials for realizing ultrathin EOT gate stacks

摘要

One of the most critical issues for Ge/III-V MOSFETs, which have been regarded as a promising CMOS structure under sub 10 nm regime, is gate insulator formation satisfying the requirements of MOS interface quality and thin equivalent oxide thickness (EOT). In this paper, we focus on viable gate stack technologies realizing these requirements. As for Ge gate stacks, we present a ultrathin EOT Al_2O_3/GeO_x/Ge gate stack fabricated by a plasma post oxidation method and pMOSFETs using this gate stack. The GeO_x/Ge MOS interface properties are systemically examined, and the relations of the interface state density (D_(it)) with the GeO_x thickness and the chemical conditions are studied. (100) Ge pMOSFETs using this gate stack is demonstrated with EOT down to 0.98 nm and high hole peak mobility of 401 cm~2/Vs. As for InGaAs gate stacks, we show the impact of Al_2O_3 inter-layers on interface properties of HfO_2/InGaAs MOS interfaces. It is found that the insertion of 0.2-nm-thick ultrathin Al_2O_3 inter-layer can effectively improve the HfO_2/InGaAs interface properties such as the frequency dispersion and the stretch-out of C-V characteristics and D_(it). The 1-nm-thick capacitance equivalent thickness (CET) in the HfO_2/Al_2O_3/InGaAs MOS capacitors is realized with good interface properties and low gate leakage of 2.4×10~(-2) A/cm~2.