The EU FP7 funded project Chip2Foil aims to realise a technology platform allowing a radically different implementation of the assembly process for ultra-thin chips(UTCs) to polymer foils. The process is based on redistribution of the tolerance budget, and consists of two major steps: self-assembly supported chip placement followed by an adaptive circuitry approach for realising the electrical interconnects. The concept accepts non-contact, low precision presentation of a UTC to the self-assembly force field, which brings the chip to a final position with moderate precision. Next, in an adaptive interconnection process the chip position is measured with respect to the circuitry on the foil and interconnects are created on an individual chip and IO basis. The main technology building blocks are described and the current performance is demonstrated, including chip thinning, fast UTC release from wafer tape, self-assembly supported chip placement using magnetic forces and adaptive electrical interconnection by laser scribing of a screen-printed silver patch.
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