The iGp (Integrated Gigasample Processor) is an innovative digital bunch-by-bunch feedback system developed by a KEK / SLAC / INFN-LNF joint collaboration. The processing unit can sample at 500 MHz and compute the bunch-by-bunch output signal for up to ~5000 bunches. The feedback gateware code is implemented inside just one FPGA (Field Programmable Gate Array) chip, a Xilinx Virtex-II. The FPGA implements two banks of 16-tap FIR (Finite Impulse Response) filters. Each filter is realtime programmable through the operator interface. At DAΦNE, the Frascati Φ-Factory, two iGp units have been commissioned in the April 2007. The iGp systems have substituted the previous betatron feedback systems. This insertion has been very fast and has shown no problems involving just a substitution of the old, less flexible, digital systems, letting unchanged the baseband analog frontend and backend. The commissioning has been very simple, due to the complete and powerful EPICS operator interface, working well in local and remote operations. The software includes also tools for analyzing post processor data. A description of the commissioning with the operations done is reported.
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