In this paper, the transistor sizing of an auxiliary output stage in a digitally controlled transient suppression system for fully integrated point-of-load (POL) DC-DC converters is investigated. The auxiliary output stage is added in parallel to the main output switching stage to help reduce output voltage deviation during load transient. The sizing of the auxiliary output stage in relation to the main output stage is studied through analysis and simulation of a 3 W, 12 V to 1 V buck converter. The auxiliary output stage performs well with transistors occupying as little as 5% the area of the main output stage.
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