Multi-threshold CMOS(MTCMOS) has been developed as one of the most efficient techniques to reduce leakage power. However, sleep transistor insertion might impose problems on power supply network design. We studied IR-drop variance by sleep transistor insertion at the full-chip level. Our work covered different modes, structures and tapping patterns. We identified in most cases the varied current distribution can be balanced locally well. Besides, “rush current” can have large and wide impacts.
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