In the last few years, Package on Package (PoP) devices have been increasingly used in cell phones, and other handheld electronic devices as they provide a high density packaging solution. As the package pitch is reduced, the package solder balls are forced to become smaller. In order to use small package balls, and still prevent interference between the packages, an interposer is used on the bottom package. The interposer raises the top package in assembly, leaving a gap between the top package and the die of the bottom package. In a standard PoP process, a top memory package is placed on a bottom logic package. The focus of this paper is a PoP Interposer (PoPi) package where a package is placed on an interposer. Although the SMT process is similar, the additional interposer interface introduces new challenges during the assembly process. This paper will describe the process characterization for successful assembly of PoPi on a board. It will also provide a process envelope addressing paste printing, part placement, flux dipping and reflow. Finally, it will also discuss common failures during SMT, how to identify them and eliminate them.
展开▼
