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Semiconductor Device Scaling: Physics, Transport, and the Role of Nanowires

机译:半导体器件缩放:物理,运输和纳米线的作用

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Nanoelectronics (including nanomagnetics and nanophotonics) generally refers to nanometer scale devices, and to circuits and architectures which are composed of these devices. Continued scaling of the devices into the nanometer range leads to enhanced information processing systems. Generally, this scaling has arisen from three major sources, one of which is reduction of the physical gate length of individual transistors. Until recently, this has also allowed an increase in the clock speed of the chip, but power considerations have halted this to levels around 4 GHz in Si. Indeed, there are indications that scaling itself may be finished by the end of this decade. Instead, there are now pushes to seek alternative materials for nano-devices that may supplement the Si CMOS in a manner that allows both higher speeds and lower power. In this paper, we will cover some of the impending limitations, and discuss some alternative approaches that may signal continued evolution of integrated circuits beyond the end of the decade.
机译:纳米电子(包括纳米磁性和纳米级)通常是指由这些装置组成的纳米级装置,以及由这些装置组成的电路和架构。将设备的持续缩放到纳米范围内导致增强的信息处理系统。通常,该缩放从三个主要来源出现,其中一个是单个晶体管的物理栅极长度的降低。直到最近,这也允许芯片的时钟速度提高,但功率考虑已经停止了SI的4 GHz左右。实际上,有迹象表明,缩放本身可能在这十年结束时完成。相反,现在推动以寻找纳米器件的替代材料,其可以以允许较高速度和更低的功率的方式补充Si CMO。在本文中,我们将涵盖一些即将发生的局限性,并讨论可能在十年结束时发出综合电路的持续演变的一些替代方法。

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