首页> 外文会议>European Conference Exhibition on Integration Issues of Miniaturized Systems – MEMS, MOEMS, ICs and Electronic Components >A Multilayer Process for the Connection of Fine-Pitch-Elements on Three-Dimensionally Molded Interconnect Devices (3D-MIDs)
【24h】

A Multilayer Process for the Connection of Fine-Pitch-Elements on Three-Dimensionally Molded Interconnect Devices (3D-MIDs)

机译:用于连接三维模制互连装置上的细间距元件的多层工艺(3D-MIDS)

获取原文

摘要

3D-MIDs are preferably injection molded structures including electrical circuits routed over a 3-dimensional surface. As shown in Fig. 1, a 3D-MID not only acts as a 3-dimensional circuit carrier but also may include functional features that can be created during the injection molding process. The combination of 3-dimensional circuits and functional features in one device offers new design capabilities complementing the standard 2-dimensional circuit board technology. 3D-MIDs are especially used in size critical applications such as cell phones or medical devices. Due to intensive research on 3D-MIDs especially the feature size of the metallization arrived in the fine pitch range. Today, 3D-MID circuit structures of less than 100 μm are used in mass production. However, due to a missing multilayer process, one limitation of the 3D-MID technology is the insufficient compatibility to related fine pitch semiconductor devices with a high I/O connection density. Therefore a new injection molding based multilayer process was developed and investigated.
机译:3D-中间优选地是注射成型结构,包括在三维表面上布线的电气电路。如图1所示。如图1所示,3D中间不仅充当三维电路载体,而且可以包括可以在注射成型过程中产生的功能特征。三维电路和一个设备功能特征的组合提供了新的设计能力,补充了标准的二维电路板技术。 3D-Mids特别用于大小的关键应用,例如手机或医疗设备。由于对3D-MID的密集研究,特别是金属化的特征尺寸到达细间距范围。如今,批量生产中使用小于100μm的3D-中间电路结构。然而,由于多层过程缺失,3D-MID技术的一个限制是与具有高I / O连接密度的相关细间距半导体器件的兼容性不足。因此,开发并研究了一种新的注塑的多层工艺。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号