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Intermixing Reactions in Nanometric Cu/Sn and Cu/Ni/Sn/Ni Multilayer Interconnects

机译:纳米Cu / Sn和Cu ​​/ Ni / Sn / Ni多层互连中的混合反应

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摘要

Current push for miniaturization and 3D packaging makes it important to understand reactions in interconnects with ultra small volume. In order to reduce processing time and to have more homogeneous interconnects, solder can be designed in a multilayer form with components layer thickness in the sub-micron or even nanometer range. In this work, reaction kinetics in multilayer interconnects consisting of stacks of [2 x (1300 nm Cu/1100 nm Sn)] and [2 x (1300 nm Cu/70 nm Ni/1100 nm Sn/70 nm Ni)] deposited by electrodeposition were investigated at room temperature and 150 °C. The progress of the reaction in the multilayers was monitored by using XRD, SEM and EDX. Results show that by inserting a 70 nanometer thick nickel layer between copper and tin, premature reaction between Cu and Sn at room temperature can be avoided. The addition of the nickel layers also allows the selective formation of Cu_6Sn_5 which is considered to have better properties compared to Cu_3Sn. Details of the reaction sequence and mechanisms are discussed.
机译:目前用于小型化和3D包装的推​​动使得了解用超小体积的互连反应非常重要。为了减少处理时间并具有更均匀的互连,可以在多层形式中设计诸如亚微米或甚至纳米范围的组件层厚度的多层形式。在这项工作中,由堆叠的堆叠组成的多层互连中的反应动力学,由沉积的[2×(1300nm / 1100nm sn)]和[2 x(1300nm cu / 70nm / 1100nm sn / 70nm ni / 70nm ni / 70nm ni)]。在室温和150℃下研究电沉积。通过使用XRD,SEM和EDX监测多层反应的进展。结果表明,通过在铜和锡之间插入70纳米厚的镍层,可以避免在室温下Cu和Sn之间的过早反应。添加镍层还允许考虑与Cu_3SN相比具有更好的性质的Cu_6SN_5的选择性形成。讨论了反应序列和机制的细节。

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