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Low-Voltage Limitations of Nano-Scale CMOS LSIs: Current Status and Future Trends

机译:纳米级CMOS LSIS的低压限制:当前状态和未来趋势

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摘要

The minimum operating voltage (Vmin) of nano-scale LSIs is investigated, focusing on logic gates, SRAM cells, and DRAM sence amplifiers in LSIs. The Vmin that is governed by SRAM cells rapidly increases as devices are miniaturized due to the ever-larger variation of the threshold voltage (VT) of MOSFETs. The Vmin, however, is reduced to the sub-one-volt region by using repair techniques and new MOSFETs (e.g., FD-SOIs and/or high-k metal gates) that can reduce VT variations.
机译:研究了纳米级LSI的最小工作电压(V MIN ),专注于LSI中的逻辑门,SRAM细胞和DRAM Sence放大器。由SRAM细胞控制的V MIN 随着MOSFET的阈值电压(V T )的变化而小型化,随着器件的小型化而迅速增加。然而,通过使用修复技术和可以减少V MIN 减少到副一伏区域。 INF> T 变体。

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