Design of a Low Power Radiation Hardened SRAM

摘要

A low power radiation hardened 256K SRAM is presented. A novel sense amplifier has been proposed and modified self-timing scheme with dummy cell for low power operation has been adopted in this SRAM. The Dual Interlocked storage Cell (DICE) and radiation hardened layout techniques have been implemented to achieve radiation hardened. It has consumed only 22% read power dissipation compared with the conventional control circuit. Test shows that it has well immunity of SEU and SEL.