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Low-power test pattern generator design for BIST via non-uniform cellular automata

机译:通过非均匀蜂窝自动机的BIST进行低功耗测试模式发生器设计

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An efficient low-power test pattern generator (TPG) design for built-in self-test (BIST) is introduced. The approach uses the non-uniform cellular automata (NUCA) model. For our purpose, we designed a polynomial-time algorithm that converts the test pattern generation problem into the classical combinatorial problem called minimum set covering (MSC) which is known to be NP-complete. Solutions to the MSC problems give the low-power design topology for the test pattern sequence. Comparative analysis of the experimental results showed that even though the obtained designs lack in wiring uniformity they are promising in terms of overall performance criteria based on fault-coverage, test length, used area and dynamic power consumed.
机译:介绍了一种有效的用于内置自检(BIST)的低功耗测试模式发生器(TPG)设计。该方法使用非均匀的蜂窝自动机(NUCA)模型。为我们的目的,我们设计了一种多项式 - 时间算法,该多项式算法将测试模式生成问题转换为称为NP-Complete的最小集合覆盖(MSC)的经典组合问题。 MSC问题的解决方案为测试模式序列提供了低功耗设计拓扑。对实验结果的比较分析表明,即使所获得的设计缺乏布线均匀性,它们在基于故障覆盖率,测试长度,使用的区域和所用动态功率的整体性能标准方面是有前途的。

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