A new method of designing built-in test pattern generator (TPG) for digital circuits is presented in the paper. the specific cellular automata register structure (henceforth denoted as DTI-LFSR) composed of D and T flip-flops with either active-high or active-low inputs is used as an effective TPG. It is shown in the paper how to find DTI-LFSR structure that generates vector sequence that contains at least some of deterministic test patterns detecting hard faults in the given circuit under test. The remaining faults, if any, are covered by the sequence of pseudo-random patterns produced either by the same DTI-LFSR structure or by its modified version supplemented with a linear feedback path, which is henceforth called IEDTI-LFR
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