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Lightweight arithmetic units for VLSI digital signal processors

机译:VLSI数字信号处理器的轻量级算术单元

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This paper presents a lightweight arithmetic for embedded signal processing, whose hardware complexity is similar to that of the integer one. In our simulations, its 16-bit version has 40.18dB signal to round-off error ratio over the IEEE single-precision floating-point arithmetic, which even out-performs the hand-optimized 32-bit code with integer arithmetic.
机译:本文介绍了嵌入式信号处理的轻量级算法,其硬件复杂性类似于整数的算术。在我们的模拟中,它的16位版本具有40.18dB的信号,以通过IEEE单精度浮点算法循环误差比,这均匀地使用整数算法执行手工优化的32位代码。

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