Novel SPICE macro modeling for an integrated Si Schottky barrier diode

摘要

A new and accurate modeling has been performed for an integrated Schottky barrier diode fabricated by 0.18 /spl mu/m standard CMOS process. The bulk and distributed effects are considered by adding macro elements to an original SPICE diode model. The resistance and capacitance model parameters have been obtained precisely by a direct extraction method using S-parameter sets with various bias points. The validity of this new model and parameter extraction method has been verified by comparing with the measured S-parameters over the wide range of bias up to 10 GHz.