【24h】

FPGA-based artificial neural network using CORDIC modules

机译:基于FPGA的人工神经网络,使用CORDIC模块

获取原文

摘要

Artificial neural networks have been used in applications that require complex procedural algorithms and in systems which lack an analytical mathematic model. By designing a large network of computing nodes based on the artificial neuron model, new solutions can be developed for computational problems in fields such as image processing and speech recognition. Neural networks are inherently parallel since each neuron, or node, acts as an autonomous computational element. Artificial neural networks use a mathematical model for each node that processes information from other nodes in the same region. The information processing entails computing a weighted average computation followed by a nonlinear mathematical transformation. Some typical artificial neural network applications use the exponential function or trigonometric functions for the nonlinear transformation. Various simple artificial neural networks have been implemented using a processor to compute the output for each node sequentially. This approach uses sequential processing and does not take advantage of the parallelism of a complex artificial neural network. In this work a hardware-based approach is investigated for artificial neural network applications. A Field Programmable Gate Arrays (FPGAs) is used to implement an artificial neuron using hardware multipliers, adders and CORDIC functional units. In order to create a large scale artificial neural network, area efficient hardware units such as CORDIC units are needed. High performance and low cost bit serial CORDIC implementations are presented. Finally, the FPGA resources and the performance of a hardware-based artificial neuron are presented.
机译:人工神经网络已用于需要复杂的程序算法和缺乏分析数学模型的系统的应用中。通过基于人工神经元模型设计大型网络的计算节点,可以开发新的解决方案以在图像处理和语音识别等领域的计算问题开发。神经网络本质上是平行的,因为每个神经元或节点都充当自主计算元件。人工神经网络对每个节点的数学模型使用来自来自同一区域中的其他节点的信息。信息处理需要计算加权平均计算,后跟非线性数学变换。一些典型的人工神经网络应用使用用于非线性变换的指数函数或三角函数。已经使用处理器实现了各种简单的人工神经网络,以顺序地计算每个节点的输出。这种方法使用顺序处理,并且不利用复杂的人工神经网络的平行性。在这项工作中,研究了一种基于硬件的方法,用于人工神经网络应用。现场可编程门阵列(FPGA)用于使用硬件乘法器,加法器和CORDIC功能单元来实现人工神经元。为了创建大规模的人工神经网络,需要区域有效的硬件单元,例如Cordic单元。提出了高性能和低成本位串行CORDICIC实现。最后,提出了FPGA资源和基于硬件的人工神经元的性能。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号