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FPGA-Based Artificial Neural Network Using CORDIC Modules

机译:使用CORDIC模块的基于FPGA的人工神经网络

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Artificial neural networks have been used in applications that require complex procedural algorithms and in systems which lack an analytical mathematic model. By designing a large network of computing nodes based on the artificial neuron model, new solutions can be developed for computational problems in fields such as image processing and speech recognition. Neural networks are inherently parallel since each neuron, or node, acts as an autonomous computational element. Artificial neural networks use a mathematical model for each node that processes information from other nodes in the same region. The information processing entails computing a weighted average computation followed by a nonlinear mathematical transformation. Some typical artificial neural network applications use the exponential function or trigonometric functions for the nonlinear transformation. Various simple artificial neural networks have been implemented using a processor to compute the output for each node sequentially. This approach uses sequential processing and does not take advantage of the parallelism of a complex artificial neural network. In this work a hardware-based approach is investigated for artificial neural network applications. A Field Programmable Gate Arrays (FPGAs) is used to implement an artificial neuron using hardware multipliers, adders and CORDIC functional units. In order to create a large scale artificial neural network, area efficient hardware units such as CORDIC units are needed. High performance and low cost bit serial CORDIC implementations are presented. Finally, the FPGA resources and the performance of a hardware-based artificial neuron are presented.
机译:人工神经网络已用于需要复杂程序算法的应用程序以及缺少分析数学模型的系统中。通过基于人工神经元模型设计大型的计算节点网络,可以针对图像处理和语音识别等领域的计算问题开发新的解决方案。神经网络在本质上是并行的,因为每个神经元或节点都充当自主计算元素。人工神经网络为每个节点使用数学模型,该模型处理来自同一区域中其他节点的信息。信息处理需要计算加权平均值计算,然后进行非线性数学变换。一些典型的人工神经网络应用程序将指数函数或三角函数用于非线性变换。已经使用处理器实现了各种简单的人工神经网络,以依次计算每个节点的输出。这种方法使用顺序处理,并且没有利用复杂的人工神经网络的并行性。在这项工作中,针对人工神经网络应用研究了一种基于硬件的方法。现场可编程门阵列(FPGA)用于通过硬件乘法器,加法器和CORDIC功能单元实现人工神经元。为了创建大规模的人工神经网络,需要区域有效的硬件单元,例如CORDIC单元。提出了高性能和低成本的比特串行CORDIC实现。最后,介绍了FPGA资源和基于硬件的人工神经元的性能。

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