A Novel SiGe-On-Insulator IMOS Device with Reduced Bias Voltages

摘要

Scaling of Metal-Oxide-Semiconductor (MOSFET) devices is reaching its physical limits due to several phenomena. Among these phenomena is the thermal diffusion of carriers at low gate voltages which limits the room temperature subthreshold slope to 60mV/dec. The Impact Ionization MOSFET (I-MOS) device was proposed by Gopalakrishnan et al [1] in order to achieve subthreshold slopes as small as 5mV/dec at room temperature. Improved process flow for fabricating this device has been reported by Choi et al [2], who also proposed a novel biasing scheme to make the IMOS device more feasible which led to implementing both a negative voltage for biasing the drain and a positive voltage for biasing the source. However, challenges lie ahead primarily in reducing the breakdown voltage of the thin film that would enable further scaling of the supply voltages. This may require further research in novel materials as well as in new structures. Threshold energy (E{sub}i) is closely related to the bandgap energy. Thus, a fundamental solution for the breakdown voltage reduction is to use a small bandgap material. A germanium based device was analyzed by Gopalakrishnan et al [3]. However, there are still many technological barriers to fabricate practical germanium devices [1]. In this paper we have investigated the possibility of implanting SiGe-On-Insulator technology to reduce the breakdown voltage in an p-IMOS device. Of course the concept can be extended to n-IMOS devices as well.