To reduce the short channel effects in modern nanoscale MOS-devices alternative device concepts like the tunneling field effect transistor have been suggested [1]. Since the complete current is sustained by tunneling processes, these devices obey different design rules than MOSFETs. Another interesting approach is the use of multigate structures. A very promising idea is the combination of these two concepts. Using two-dimensional device simulations, we investigate the performance of such cylindrical nanowire tunneling transistors.
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