Off-line Wafer Level Reliability Control: Unique measurement method to monitor the lifetime indicator of gate oxide validated within Bipolar/CMOS/DMOS technology

摘要

We have recently published~1 a paper on a new rapid method for the determination of the lifetime of the gate oxide involved in a Bipolar/CMOS/DMOS technology (BCD). Because this previous method was based on a current measurement with gate voltage as a parameter needing several stress voltages, it was applied only by lot sampling. Thus, we tried to find an indicator in order to monitor the gate oxide lifetime during the wafer level parametric test and involving only one measurement of the device on each wafer test cell. Using the weibull law and Crook model, combined with our recent model, we have developed a new test method needing only one electrical measurement of MOS capacitor to monitor the quality of the gate oxide. Based also on a current measurement, the parameter is the lifetime indicator of the gate oxide. From the analysis of several wafers, we gave evidence of the possibility to detect a low performance wafer, which corresponds to the infantile failure on the Weibull plot (cumulative failure of all the wafers versus time to failure). In order to insert this new method in the BCD parametric program, a parametric flowchart was established. This type of measurement is an important challenge, because the actual measurements, breakdown charge, Q_bd, and breakdown electric field, E_bd, at parametric level (off-line) and E_bd and interface states density, D_it, during the process (on-line) cannot guarantee the gate oxide lifetime all along fabrication process. This indicator measurement is the only one, which predicts the lifetime decrease.