Mixed Signal Hybrid OEICs: AnP I-MSM Integrated Onto a CMOS Analog Optical Receiver with a Digital CMOS Microprocessor

摘要

One avenue to the use of optics in computing is the integration of optoelectronic (OE) devices and circuits. Access to VLSI CMOS circuitry is key for the realization of systems which can perform highly complex processing tasks. Using hybrid integration of OE devices with CMOS VLSI, one exciting prospect for optics is that of optical interconnect for connecting high speed digital processors, since conventional wire based interconnect and packaging technologies are reaching limits of both speed and packing density [1]. To realize the integration of OE with CMOS VLSI, however, analog OE interface circuits must operate in the presence of digital signal processing circuitry, which produce digital noise. Sensitive CMOS receivers [2-9] have not been demonstrated operating next to a running microprocessor, and, in the noisy digital microprocessor environment, noise levels of hundreds of millivolts with picosecond rise times are not uncommon, which significantly negatively impact receiver operation. In this paper, a fully differential CMOS receiver designed to operate in a noisy digital microprocessor environment is examined. This receiver has been fabricated on the same CMOS die next to a SIMD microprocessor for test in a noisy digital environment. This receiver has been hybrid integrated with an inverted metal-semiconductor-metal (I-MSM) photodetector, and operation of the integrated receiver has been demonstrated with a bit error rate (BER) of at least 10~(-9) in the noisy digital microprocessor environment.