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Opportunities and challenges in building silicon products in 65nm and beyond

机译:在65nm及以后建造硅产品的机遇和挑战

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摘要

The demand for cheaper, faster and more integrated semiconductor products is expected to drive the scaling of silicon technology, enabling continuance of Moore's law at least for another decade. However, technology scaling presents several manufacturing and design technology challenges that must be overcome to build semiconductor products in a cost effective manner. While some of the existing challenges that we face today such as power, process variations are expected to become worse at smaller geometries requiring innovations, new problems may arise in integrating heterogeneous technologies such as RF, MEMS on the same die/package. A myriad of design technology challenges starting from functional validation to timing validation and design for test to manufacturability must be addressed to successfully build products. The paper will highlight challenges and identify some of the opportunities in driving design technologies forward.
机译:预计对更便宜,更快,更综合的半导体产品的需求将推动硅技术的缩放,至少可以在另一十年内至少开展摩尔定律。然而,技术缩放呈现了几种制造和设计技术挑战,必须以经济高效的方式构建半导体产品。虽然我们今天如下所面临的一些现有挑战,但在需要创新的较小几何形状中,我们将变得更糟,而在需要创新的较小几何形状中,则可能在将异构技术(如RF,MEM)上相同的模具/包装中的异构技术而产生新的问题。必须解决从功能验证到定时验证和测试的设计技术挑战的无数,必须解决成功构建产品。本文将突出挑战,并确定驾驶设计技术前面的一些机会。

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