首页> 外文会议>IEEE International Conference on Microelectronic Test Structures >High speed test structures for in-line process monitoring and model calibration CMOS applications
【24h】

High speed test structures for in-line process monitoring and model calibration CMOS applications

机译:用于在线过程监控和模型校准的高速测试结构CMOS应用

获取原文

摘要

The use of in-line test structures for routinely monitoring various high frequency aspects of the performance of CMOS gates is described. These compact test structures use DC I/Os and are compatible with standard parametric testers. The specific examples described are ring oscillators for a wide range of self-consistent parameter extraction ranging from circuit delays to gate length and leakage components; and a new class of self-timed/calibrated structure of which a circuit for measuring SOI switching history effects, utilizing 100 ps time-scale self-generated pulses, is presented as a representative example.
机译:描述了在线测试结构来常规监测CMOS门的性能的各种高频方面。这些紧凑的测试结构使用DC I / O,并与标准参数测试仪兼容。所描述的具体实例是用于各种自我一致的参数提取的环形振荡器,从电路延迟到栅极长度和泄漏部件的范围;和新类别的自定时/校准结构,其中用于测量SOI切换历史效果的电路,利用100 ps的时间尺度自生物脉冲作为代表性示例。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号