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Model-based guard ring structure guideline for the enhancement of silicon-based single photon avalanche diode characteristics

机译:基于模型的保护环结构,用于增强硅基单光子雪崩二极管特性

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Single photon avalanche diodes (SPADs) manufactured through the standard CMOS process have a major advantage inreducing the cost and expendability in comparison with the SPAD made with the custom process.SPAD is a single photon sensitive diode using the avalanche phenomenon and operated in Geiger-mode which applies avoltage higher than the breakdown voltage of the device. Therefore, SPAD is exposed to a higher voltage than otherdevices and has a high electric field in the multiplication region.In SPAD operating with such a high electric field, the guard ring prevents edge breakdown and serves to focus theelectric field on the intended multiplication region. Therefore, the optimized guard ring structure is required for the highefficiencySPAD designs. The deep virtual guard ring is designed to cope with deeper multiplication regions formed bydeep n-well and p-well, thus providing higher photon detection probability (PDP) and enhanced response at a longerwavelength.In this paper, the four possible Silicon-based SPAD candidates of different deep virtual guard rings formed by thecombination of shallow trench isolation (STI) and p-substrate layer fabricated through standard CMOS process areinvestigated and their electric characteristics of the SPAD, such as the current-voltage (Ⅰ-Ⅴ) characteristic, and opticalcharacteristics, such as dark count rate (DCR), and PDP, are measured.In addition, TCAD simulations are used to verify the characteristic variation by analyzing the electric field profiles.Based on the results, the optimized structure of the SPAD with the deep virtual guard ring can be proposed.
机译:通过标准CMOS工艺制造的单光子雪崩二极管(SPAD)具有主要优势与用自定义过程制作的SPAD相比,降低成本和消耗性。Spad是一种使用雪崩现象的单个光子敏感二极管,并在盖麦模式下操作,施加a高于设备的击穿电压的电压。因此,Spad暴露于比其他更高的电压设备在乘法区域中具有高电场。在用这种高电场操作的皮带中,保护环可以防止边缘击穿并用于聚焦预期乘法区域上的电场。因此,优化的保护环结构需要效率效率Spad设计。深虚防罩环旨在应对由此形成的更深层次的乘法区深N-Well和P阱,从而提供更高的光子检测概率(PDP)和增强响应较长波长。在本文中,由不同深虚防罩环的四种可能的硅基候选候选通过标准CMOS工艺制造的浅沟槽隔离(STI)和P衬底层的组合是研究及其电流电压(Ⅰ-Ⅵ)特性和光学电流的电气特性测量诸如暗计数率(DCR)和PDP的特征。此外,TCAD模拟用于通过分析电场轮廓来验证特征变化。基于结果,可以提出与深虚防罩环的示波器的优化结构。

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