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Fractional Quantum Conductance In Edge Channels Of Silicon Quantum Wells

机译:硅量子阱边缘通道的分数量子电导

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We present the findings for the fractional quantum conductance of holes that is caused by the edge channels in the silicon nanosandwich prepared within frameworks of the Hall geometry. This nanosandwich represents the ultranarrow p-type silicon quantum well (Si-QW), 2 nm, confined by the δ-barriers heavily doped with boron on the n-type Si (100) surface. The edge channels in the Si-QW plane are revealed by measuring the longitudinal quantum conductance staircase, G_(xx), as a function of the voltage applied to the Hall contacts, V_(xy), to a maximum of 4e~2/h. In addition to the standard plateau, 2e~2/h, the variations of the V_(xy) voltage appear to exhibit the fractional form of the quantum conductance staircase with the plateaus and steps that bring into correlation respectively with the odd and even fractions.
机译:我们介绍了由在霍尔几何形状的框架内制备的硅纳米氏硅中的边缘通道引起的孔的分数量子电导。该纳米氏菌属代表超轴P型硅量子阱(Si-QW),2nm,被Δ-屏障在n型Si(100)表面上掺杂硼的δ-屏障。通过测量纵向量子电导阶段,G_(XX),作为施加到霍尔触点的电压,V_(XY)的电压,最大为4E〜2 / h的函数来揭示SI-QW平面中的边缘通道。 。除了标准平台2E〜2 / h之外,V_(XY)电压的变化似乎表现出量子电导楼梯的分数形式,其具有分别与奇数甚至馏分分别引起相关性的plateaus和步骤。

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