An LCP Package Model for Use in Chip/Package Co-Design of an X-band SiGe Low Noise Amplifier

机译：用于芯片/封装的LCP封装模型，用于X波段SiGe低噪声放大器的Chip / Package Co-Design

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We present the modeling of a liquid crystal polymer (LCP) package for use with an X-band SiGe HBT Low Noise Amplifier (LNA). The package consists of a 2 mil LCP laminated over an embedded SiGe LNA, with vias in the LCP serving as interconnects to the LNA bondpads. An accurate model for the packaging interconnects has been developed and verified by comparing to measurement results, and can be used in chip/package co-design.

机译：我们介绍了液晶聚合物（LCP）封装的建模，用于X频带SiGe HBT低噪声放大器（LNA）。该包装由层压在嵌入的SiGE LNA上的2密耳LCP组成，LCP中的通孔用作互连的LNA键合剂。通过与测量结果相比，已经开发和验证了用于包装互连的准确模型，并且可以用于芯片/包装共同设计。

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《Conference on Electrical Performance of Electronic Packaging and Systems》|2009年||共4页
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Chung Hang John Poh; Tushar K. Thrivikraman; Swapan K. Bhattacharya; Chad E. Patterson; John D. Cressler; John Papapolymerou;
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中图分类 TN305.4-53;
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1. Packaging Effects of Multiple X-Band SiGe LNAs Embedded in an Organic LCP Substrate [J] . Poh C. H. J., Patterson C. E., Bhattacharya S. K., Components, Packaging and Manufacturing Technology, IEEE Transactions on . 2012,第8期

机译：嵌入有机LCP基板中的多个X波段SiGe LNA的封装效应
2. From model to low noise amplifier monolithic microwave integrated circuit: 0.03–2.6 GHz plastic quad-flat no-leads packaged Gallium-Nitride low noise amplifier monolithic microwave integrated circuit [J] . Osmanoglu Sinan, Ozbay Ekmel International journal of numerical modelling . 2021,第5期

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3. Modeling and Analysis of Power Supply Noise Imbalance on Ultra High Frequency Differential Low Noise Amplifiers in a System-in-Package [J] . Koo K., Shim Y., Yoon C., Advanced Packaging, IEEE Transactions on . 2010,第3期

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4. An LCP Package Model for Use in Chip/Package Co-Design of an X-band SiGe Low Noise Amplifier [C] . Chung Hang John Poh, Tushar K. Thrivikraman, Swapan K. Bhattacharya, Conference on Electrical Performance of Electronic Packaging and Systems . 2009

机译：用于芯片/封装的LCP封装模型，用于X波段SiGe低噪声放大器的Chip / Package Co-Design
5. Compact physical models for power supply noise and chip/package co-design in gigascale integration (GSI) and three-dimensional integration systems. [D] . Huang, Gang. 2008

机译：千兆位集成（GSI）和三维集成系统中用于电源噪声和芯片/封装协同设计的紧凑型物理模型。
6. Co-Design Method and Wafer-Level Packaging Technique of Thin-Film Flexible Antenna and Silicon CMOS Rectifier Chips for Wireless-Powered Neural Interface Systems [O] . Kenji Okabe, Horagodage Prabhath Jeewan, Shota Yamagiwa, 2015

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7. A Baseband Ultra-Low Noise SiGe:C BiCMOS 0.25 µm Amplifier And Its Application For An On-Chip Phase-Noise Measurement Circuit [O] . S. Godet, É. Tournier, O. Llopis, 2009

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8. Manufacturable Tri-Stack AlSb/InAs HEMT Low-Noise Amplifiers Using Wafer-Level-Packaging Technology for Light-Weight and Ultralow-Power Applications [R] . Chou, Y. C., Chang-Chien, P., Yang, J. M., 2009

机译：可制造的三叠层alsb / Inas HEmT低噪声放大器，采用晶圆级封装技术，适用于轻量级和超低功耗应用

An LCP Package Model for Use in Chip/Package Co-Design of an X-band SiGe Low Noise Amplifier

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