Latency insensitive protocols (LIP) were originally based on valid/stall handshakes between components and relays stations. However, for designs whose connection graph is a single strongly connected component(SCC), it was shown that static scheduling of computation achieves better throughput. Unfortunately, for a system composed of multiple SCCs such global static scheduling is not possible. Recent work has shown how to minimize back pressure (stall) based flow control for such systems. However, that solution does not necessarily achieve optimal throughput because it only minimizes back-pressure without attempting to optimize throughput. Throughput optimizing solutions for latency insensitive systems also exists, which require a mixed Integer Linear Programming (MILP) solution that inevitably does not scale for large systems. Moreover, that throughput optimizing solution uses back pressure for every connection leading to area overhead and further interconnect routing issues. In this paper, we consider an optimization technique for the synthesis of latency insensitive systems. In particular, we consider a synchronous hardware system which is composed of multiple SCCs. We provide algorithm for synthesizing a latency insensitive implementation which minimizes back-pressure while maximizing throughput. Our approach scales because we formulate MILP whose size is significantly smaller than that of the previous throughput optimizing MILP formulation. To the best of our knowledge, this is the first optimization technique considering both back pressure and throughput of latency insensitive system in the literature.
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