The mechanism of work function tuning in Ni{sub}xSi{sub}y gates was investigated critically. Furthermore, the role of the underlying dielectric (SiO{sub}2 and high-k materials) was also evaluated and it was found that the work function tuning mechanism strongly depends upon the concentration of SiO{sub}2 in the dielectric. Ternary alloy silicides Ni{sub}xTa{sub}(1-x)Si and Ni{sub}xPt{sub}(1-x)Si were investigated as possible gates for NMOS and PMOS application repectively. Φ{sub}m of 4.27eV and 5.1eV was achieved for the cases of Ta rich and Pt rich silicides on SiO{sub}2. However, the window of Φ{sub}m range reduced as hafnium was added to the dielectric such that for the case of HfO{sub}2 dielectric, the range reduced to 200meV. We attribute this to Fermi level pinning due to increase in Hf+Si bonds. Critical investigation of the role of dielectric-metal gate interface was carried out. Results of varying the Ni and Si composition on SiO{sub}2, HfO{sub}2 and HfSiO{sub}x dielectrics and resulting variation of EOT and Φ{sub}m are compared. We report dielectric surface related possible phase modulation of Ni{sub}xSi{sub}y gates. To understand the co-relation of EOT variation with work function of the metal gate, top interface of HfSiO{sub}x was modulated and the results of such modulation affected increase in the Φ{sub}m tuning.
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