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Novel Method of Separating Probe and Wire Bond Regions Without Increasing Die Size

机译:在不增加模尺寸的情况下分离探针和线粘合区域的新方法

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The drive for enhanced electrical performance and reduced silicon area has triggered significant changes 'in wafer fabrication, wafer level testing, and packaging technologies. In the wafer fab, copper is quickly replacing aluminum as the interconnect metal of choice for technologies 0.13μm and below. To overcome the difficulty of wire bonding onto readily oxidized copper bond pads, capping copper bond pads with aluminum has been the industry standard remetalization for wire bonding for copper technology. In terms of wafer level testing and packaging, the resulting fine pitch geometry has created challenges for both cantilever probe and wire bond processes. Pad damage due to probe marks has been shown to cause "non-sticks" and "lifted bonds" at wire bonding. The wire bond yield loss due to pad damage is aggravated for fine pitch since increasingly smaller bonded ball diameters are formed on top of the same damage area caused by the probe mark. Wire Bond parameter optimization can minimize wire bond yield loss but cannot eliminate the problem. One logical solution is to lengthen the bond pad to create separate regions for probing and wire bonding. However, this method can result in a larger die size. This paper will reveal a unique bond pad structure that provides separate regions but yet results in no impact to the existing die size. This bond pad structure utilizes the aluminum cap layer to create a longer bond pad without changing the size of the underlying copper last metal, resulting in no impact to the existing die size. Evaluations were conducted on 0.13μm CMOS technology, with cantilever probing and wire bonding on 52μm bond pad size. Failure analysis and test methods to detect failures will be discussed. Designs of experiments for probing and wire bonding processes, characterization studies, and reliability results will be presented.
机译:用于增强电气性能和降低的芯片区域的驱动器在晶片制造,晶片级测试和包装技术中引发了显着的变化。在晶片Fab中,铜正在迅速更换铝,作为0.13μm和以下技术选择的互连金属。为了克服在容易氧化铜粘合焊盘上的线粘合的难度,用铝的覆盖铜粘接垫是铜技术引线键合的行业标准密封。就晶圆级测试和包装而言,所得到的细俯仰几何形状为悬臂探针和线键工艺产生了挑战。由于探针标记引起的焊盘损坏已经显示为引线键合的“非粘性”和“升降粘合”。由于垫损坏引起的线键屈服损失对于细间距而加剧,因为在由探针标记引起的相同损坏区域的顶部形成越来越小的粘合球直径。线键参数优化可以最大限度地减少线键屈服损失,但不能消除问题。一个逻辑解决方案是延长键合垫以创建用于探测和引线键合的单独区域。但是,这种方法可以导致更大的芯片尺寸。本文将揭示一种独特的粘接垫结构,提供单独的区域,但导致对现有的模具大小没有影响。该键合焊盘结构利用铝盖层产生较长的粘接垫,而不改变下面铜的最后金属的尺寸,导致对现有的模具尺寸没有影响。评估在0.13μmCMOS技术上进行,悬臂探测和线粘合在52μm键焊盘尺寸上。将讨论检测故障的故障分析和测试方法。将提出探测和引线键合工艺,表征研究和可靠性结果的实验​​设计。

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