Gate Current Partitioning in MOSFET Models for Circuit Simulation

摘要

Gate current plays a critical role in circuits featuring sub-100nm MOSFETs. Thus, the importance of an accurate gate current model for circuit simulation is indisputable. As the trend of developing surface-potential-based compact models continues to evolve, we demonstrate that using one such model, HiSIM (Hiroshima STARC IGFET Model), to simulate gate current provides reasonably accurate results in the direct tunneling regime when compared to measurement data. To provide an accurate yet compact description, a gate current partitioning model suitable for circuit simulation is presented and validated by two-dimensional device simulation.