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Modeling the Partition of Noise From the Gate-Tunneling Current in MOSFETs

机译：根据MOSFET的栅极隧穿电流对噪声分配进行建模

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Juan C. Ranuárez; Student Member; M. Jamal Deen; Chih-hung Chen;
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年度 2008
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1. Modeling the Partition of Noise From the Gate-Tunneling Current in MOSFETs [J] . Juan C. Ranuarez, M. Jamal Deen, Chih-Hung Chen IEEE Electron Device Letters . 2005,第8期

机译：根据MOSFET的栅极隧穿电流对噪声分配进行建模
2. A Surface Potential-Based Compact Model of n-MOSFET Gate-Tunneling Current [J] . Xin (Ben) Gu, Ten-Lon Chen, Gennady Gildenblat, IEEE Transactions on Electron Devices . 2004,第1期

机译：基于表面势的n-MOSFET栅极隧穿电流紧凑模型
3. New approach for the gate current source-drain partition modeling in advanced MOSFETs [J] . K. Romanjek, F. Lime, G. Ghibaudo, Solid-State Electronics . 2003,第10期

机译：先进MOSFET中栅极电流源极-漏极分区建模的新方法
4. High Frequency Drain Current Noise Modeling in MOSFETs under Sub-Threshold Condition [C] . L. H. K. Chan, K. S. Yeo, K. W. J. Chew, International Symposium on Integrated Circuits . 2009

机译：子阈值条件下MOSFET中的高频漏极电流噪声模型
5. 1/f noise in hafnium based high-k gate dielectric MOSFETs and a review of modeling [D] . Devireddy, Siva Prasad. 2007

机译：基于Hafnium的高k栅极电介质MOSFET的1 / F噪声及造型评论
6. Empirical and Theoretical Modeling of Low-Frequency Noise Behavior of Ultrathin Silicon-on-Insulator MOSFETs Aiming at Low-Voltage and Low-Energy Regime [O] . Yasuhisa Omura 2019

机译：面向低电压低能耗的超薄绝缘体上硅MOSFET低频噪声行为的经验和理论模型
7. Analysis and modeling for random telegraph noise of GIDL current in saddle MOSFET for DRAM application [O] . Dyukyoung Moon, Hyunseul Lee, Changhwan Shin, 2014

机译：DRAM应用马鞍MOSFET中GIDL电流随机电报噪声的分析与建模
8. Analytical Prediction of the Interior Noise for Cylindrical Models of Aircraft Fuselages for Prescribed Exterior Noise Fields. Phase 2: Models for Sidewall Trim, Stiffened Structures and Cabin Acoustics with Floor Partition [R] . Pope, L. D., Wilby, E. G. 1982

机译：原始外部噪声场飞机保险丝圆柱模型内部噪声的解析预测。阶段2：侧壁修剪，加强结构和带有地板分隔的舱室声学模型

Modeling the Partition of Noise From the Gate-Tunneling Current in MOSFETs

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