Embedded Die Substrates for Power Applications

摘要

Historically, power die like MOSFETs have been packaged on lead frames using wire bonds as interconnects. To facilitate current carrying requirements, thick wires and sometimes also clips were used, to handle the total electrical and thermal conductivity requirements. As die are being thinned, it has become possible to take advantage of new electrical designs and locate source and drain on opposite sides of the die. Such die can now be easily packaged by embedding the power die in organic substrates. The die is bonded on a Cu pad and covered by prepreg and copper foil during lamination. Source, drain and gate pads are accessed from the top side with laser vias and filled with plated copper. Finally, the top side is patterned and protected with solder mask. Electrical and thermal modeling data can demonstrate the performance efficiency while reducing the form factor in accordance with the miniaturization requirements of mobile applications. Aside from single die packages, more advanced packages can be built containing multiple power die and controller die. The basic process flow remains the same but does require some adaptation. If so desired, additional components may be assembled on top of the embedded die package leading to further integration and miniaturization.