Improved direct polish STI CMP process with high selectivity slurry: reduced microscratching increased productivity

摘要

For device manufacturing at 130nm and below, direct polish STI CMP processes utilizing advanced consumables such as ceria-based high selectivity slurry (HSS) are required. This paper summarizes recent developments made in ceria HSS direct STI processing on Applied Materials' Mirra CMP system. Development has focused on achieving greater productivity through reducing microscratches, increasing throughput, and decreasing cost of ownership, while maintaining excellent planarity performance. The process reported here takes advantage of the Mirra system's three-platen architecture with process steps optimized on each platen to provide the polishing characteristics required during sequential phases of STI overburden removal and planarization. Excellent planarity and microscratch performance are demonstrated in a 2500 wafer extended run on MIT STI mask pattern wafers and DRAM short loop wafers.