Impact of on-chip interconnect frequency-dependent R(f)L(f) on digital and RF design

摘要

On-chip interconnect exhibits clear frequency-dependence in both resistance and inductance. A compact ladder circuit model is developed to capture this behavior, and we examine its impact on digital and RF circuit design. It is demonstrated that the use of DC values for R and L is sufficient for delay analysis, but RL frequency dependence is critical for the analysis of signal integrity, shield line insertion, power supply stability, and RE inductor performance.