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Fabrication and properties of Bi/sub 2/SiO/sub 5/ thin films for MFIS structures

机译:用于MFIS结构的Bi / Sub 2 / SiO / Sub 5 /薄膜的制造和性质

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Bismuth silicate (Bi/sub 2/SiO/sub 5/) thin films, expected to be suitable as the intermediate buffer layer for metal-ferroelectric-insulator-semiconductor (MFIS) structures, were fabricated on Si[100] wafers by rf magnetron sputtering. It was confirmed that the resultant films were single phase Bi/sub 2/SiO/sub 5/ with c-axis dominant orientation. The relative dielectric constant was estimated to be approximately 14. The leakage current density of the metal-insulator-semiconductor (MIS) diode is on the order of 10/sup -10/ A cm/sup -2/. under an applied electric field of less than 350 kV cm/sup -1/. In the capacitance-voltage (C-V) characteristics measurement results, it is worth nothing that hysteresis is hardly observed. The interface trap density at the midgap is estimated to be approximately 6 /spl times/ 10/sup 12/ cm/sup -2/ eV/sup -1/. The numerical results indicate that the MFIS capacitor can be reversed at a low applied voltage.
机译:硅酸盐(Bi / Sub 2 / SiO / Sub 5 /)薄膜,预期适用于金属 - 铁电绝缘体 - 半导体(MFIS)结构的中间缓冲层,通过RF磁控管在Si [100]晶片上制造溅射。证实所得薄膜是单相Bi / Sub 2 / SiO / Sub 5 /具有C轴优势取向。估计相对介电常数为约14.金属 - 绝缘体 - 半导体(MIS)二极管的漏电流密度约为10 / sup -10 / a cm / sup -2 /。在施加的电场下,小于350 kV cm / sup -1 /。在电容 - 电压(C-V)特性测量结果中,值得没有滞后滞后。 Midgap的界面阱密度估计为约6 / spl时间/ 10 / sup 12 / cm / sup -2 / EV / sup -1 /。数值结果表明MFI电容器可以以低施加的电压反转。

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