The first application of Porous Silicon to the so-called SOI technology (Silicon-on-Insulator) has been reported in 1981 by Imai. More recently, the Canon Company has recently started the production of ELTRAN (Electrochemical Transfer) SOI wafers in a new plant. The ELTRAN method is based on Porous Silicon, and it seems that there is still a future for such technology. Both the "smart cut" and the ELTRAN methods are based onto a transfer of the c-Si active layer from the process wafer to the device wafer. This avoids opening windows in the c-Si active layer, which is obviously a constraint for VLSI design. The basic idea of the BELPHI (Buried Etchable Layer by Phosphorus High-energy Implantation) is to avoid epitaxy, transfer, and wafer polishing. As a consequence for the reduced complexity of the process, windows must be opened in the active layer. The advantage is the low cost of the products. Obviously, BELPHI wafers are more attractive for micromachining and other niche applications rather than VLSI and ULSI. BELPHI technique derives from the ISLANDS method proposed by Texas Instruments in 1985. The starting structure is n-/n+/n-.As in that case, this structure provides the highest selectivity to HF electrochemical etching. The difference, here is that the n+ buried layer is obtained simply by high-energy implantation of P atoms. After photolithographic patterning and window opening to allow the contact of the HF solution with the n+ layer, electrochemical etching is applied. Following steps include the hardening of the structure, drying, preoxidation, and dry oxidation at 1000 C.
展开▼
