The quest for high mobility and high stability thin film transistors (TFTs) has led to low temperature poly-silicon (LTPS) as the technology of choice for flat panel displays and imagers. However, LTPS can suffer from high cost particularly when scaled to large areas. A low cost alternative would be the as-deposited material that does not require complex processing and which has much higher uniformity than LTPS over large areas. Indeed the direct deposition of good quality hydrogenated nanocrystalline silicon (nc-Si) films by the standard radio-frequency (RF) plasma enhanced chemical vapor deposition (PECVD) has shown promising results. High mobilities have been reported for both n-channel and p-channel TFTs (1). More importantly, the nc-Si TFT under prolonged gate bias is far more stable than its a-Si:H counteipart, and appears to not to show any evidence of defect state creation under DC bias stress conditions (2). These attributes enable the application of nc-Si TFTs in newly emerging application areas where it is required to function as an analog circuit element to provide a stable current. This is particularly true in organic light emitting diode (OLED) displays, in which the shift in threshold voltage in the TFT must be minimized to source a stable current (3). Furthermore, nc-Si can be deposited at low temperatures on low cost, lightweight and flexible substrates. While high device mobilities have been achieved with top-gate, oxide (a-SiO_x:H) gate dielectric nc-Si TFTs (due to the higher crystallinity of the channel layer at the top interface), the bottom-gate structure with silicon nitride (a-SiN_x:H) gate dielectric is the current industrial standard that is widely used in the manufacturing of LCDs (1,2). Although the bottom-gate nc-Si TFT performance characteristics are very similar to that of a-Si:H TFTs, they render far better V_T stability (4).
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