Protection Layer Effects on the Device Performance of Oxide/Organic Hybrid TFTs

摘要

Oxide semiconductors are attracted many attentions as an active layer of flexible devices because of their high mobility and low-temperature process. (1, 2) There are many issues in the oxide TFTs related to the device performance and stability such as origin of n-type conduction, bias stability, photon-induced negative bias instability, and environmental effects. We believe that the minimization of clock-wise and anti clock-wise hysteresis is necessary to correctly understand the above mentioned properties. (3)~(5) Moreover, oxide TFTs are not only sensitive to the front channel formation method and materials, but it can be also affected by back channel state, that means environmental condition with air exposed back channel surface (without passivation) and deposition materials/method of passivation layer in passivated device. (6) To understand and improve the hysteresis characteristics and device stability of oxide and oxide/organic hybrid TFTs, we adopt protection and buffer layer for the active and active/GI interface, respectively. In this paper, we fabricated transparent Oxide and Oxide/Organic hybrid thin film transistors (TFTs) using the 3-type bottom gate structure to understand the protection layer (PL) and buffer layer (BL) effects on the devices performance.