Thermal analysis of a chip scale package technology

摘要

This paper investigates the thermal performance of chip scale packages. Their small size limits the amount of heat removal from the package top directly to the air, thus the large majority of the heat must be conducted into the circuit board on which they are mounted. Simulations reveal /spl Theta//sub ja/, is a strong function of package size, with I/O count and die size having lesser influence. The thermal characteristics of the circuit board including the presence of other heat dissipating sources have the greatest influence on package thermal performance within the system level environment.