In this paper we are going to show a method of defining a group of C4 bumps that can be placed in a repeated manner on silicon die. It is also shown that for a given package design guideline all these bumps can be routed in a given package layer. This method also allows one to route a maximum number of C4 bumps for a given number of package layers. These groups of bumps can be placed along the die edge, along the diagonals of the die, or both. This method is also verified by extensive experimental drawings on various die sizes, as well as for various package design guidelines. It is shown that this method takes the minimum distance from the die edge for the placement of the maximum number of bumps for a given package routing layer. If the numbers of I/Os are reasonable compared to the die size, then this design methodology can help one design a set of bond pads in the die that can be utilized both for C4 and for wire bond technology.
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