首页> 外文会议>Fault-Tolerant Computing, 1994. FTCS-24. Digest of Papers., Twenty-Fourth International Symposium on >On latching probability of particle induced transients incombinational networks
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On latching probability of particle induced transients incombinational networks

机译:关于粒子诱发瞬态的闭锁概率组合网络

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The question to what extent particle induced transients incombinational parts of a circuit propagate into memory elements isaddressed in this paper An experimental method is presented in which theproportion of bit flips originating from heavy-ion hits in combinationallogic is determined. It is proposed that a voltage pulse may onlypropagate through a limited number of transistor stages and still belatched. The proportion of all transients in combinational logic thatwere latched into registers was experimentally, estimated to be between0.7·10-3 and 2·10-3 for a customdesigned CMOS circuit. Very few multiple bit flips were observed duringthe experiments which indicates that the single bit flip model used inmany high-level simulations is reasonable accurate
机译:问题是粒子在多大程度上诱发了瞬态 电路的组合部分传播到存储元件中 本文提出了一种实验方法,其中 重离子击中组合产生的位翻转的比例 逻辑已确定。建议电压脉冲只能 通过有限数量的晶体管级传播,并且仍然 锁住。组合逻辑中所有瞬态的比例 被锁存到寄存器中是实验性的,估计介于 0.7·10 -3 和2·10 -3 用于自定义 设计的CMOS电路。在此期间,几乎没有观察到多位翻转 实验表明,单翻转模型用于 许多高级模拟是合理准确的

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