首页> 外文会议>Electron Devices Meeting, 1998. IEDM '98 Technical Digest., International >Dry etch sequencing induced gate oxide degradation due to metalliccontamination in 0.25 μm CMOS manufacturing
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Dry etch sequencing induced gate oxide degradation due to metalliccontamination in 0.25 μm CMOS manufacturing

机译:干法刻蚀顺序导致金属引起的栅氧化层退化0.25μmCMOS制造中的污染

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To ensure maximum tool utilization in high volume semiconductormanufacturing, multiple etch recipes may be implemented on a given etchchamber configuration. Due to the increased process complexity requiredfor 0.25 μm semiconductor fabrication, residual effects in chambersand interaction between etch recipes can change individual etch processoutputs. Described below is 40 Å gate oxide degradation due toresidual metallic contamination in an etch chamber caused by a previouscontact etch process, in high volume 0.25 μm CMOS manufacturing.Chamber seasoning, the specific combination of etch processes run due toproduct needs, post-etch cleans, and gate polysilicon doping all have asignificant effect on the degree of oxide degradation caused. Alsodiscussed is the impact of the degraded oxide on circuit yield andreliability
机译:确保在大批量半导体中最大程度地利用工具 制造中,可以在给定的蚀刻上实施多种蚀刻配方 腔室配置。由于所需的过程复杂性增加 对于0.25μm的半导体制造,腔室中的残留效应 蚀刻配方之间的相互作用可以改变各个蚀刻工艺 输出。下面描述的是由于40 A栅极氧化物的降解 蚀刻室中先前产生的残留金属污染 接触蚀刻工艺,可大批量生产0.25μmCMOS。 腔室调味,蚀刻工艺的特定组合是由于 产品需求,蚀刻后清洗和栅极多晶硅掺杂都具有 显着影响所引起的氧化物降解程度。还 讨论的是降解的氧化物对电路成品率的影响,以及 可靠性

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