A 0.4 micron fully complementary BiCMOS technology for advancedlogic and microprocessor applications

摘要

A modular process architecture has been adopted to develop aversatile yet manufacturable, single-poly, four-level metal, fullycomplementary BiCMOS technology for sub-0.5 μm logic andmicroprocessor products. Both the poly-emitter vertical n-p-n and p-n-pbipolar transistors are integrated into a dual-poly(n+/p+) gate CMOS process flow. Using a pedestalimplant in the emitter window, the n-p-n performance has been enhancedto 26 GHz. Lateral p-n-p and TiSi₂ Schottky barrier diodedevices formed during the titanium self-aligned silicide process areavailable for various circuit applications. Stacking of thetungsten-plug contacts and vias is allowed in the multilevelmetallization module. A process window analysis has also been performedto derive the optimal device design targets. Compared with the CMOScounterpart, approximately 40% speed improvement (at 3.3 V V_cc) in a 68030 critical path has been demonstrated using thislogic BiCMOS technology