CMOS integrated circuits; MOSFET; energy gap; integrated circuit layout; reference circuits; TC performance; TSMC FinFET process; chip area reduction; high-accuracy applications; layout floorplan; medium accuracy applications; size 16 nm; stage stack-gate; temperature 40 degC to 125 degC; ultracompact untrimmed CMOS bandgap reference circuit; voltage 1 V; Arrays; Layout; Logic gates; Mirrors; Photonic band gap; Temperature measurement; Transistors; Bandgap voltage reference; FinFET circuit; MOS array layout; current mirror; opamp; stack gate;
机译:7-nm FinFET中的1V带隙基准电压源,具有可编程的温度系数,并且在-45°C至125°C范围内的精度为±0.2%
机译:从$ {-} $ 40 $ ^ {circ} $ C到125 $ ^ {circ} $ C的$ 3sigma $不精确度为$ pm $ 0.15%的单边CMOS带隙基准
机译:具有ESD保护的片上电磁带隙结构可抑制16nm FinFET CMOS中的噪声
机译:超紧凑,未经监测的CMOS带隙参考,16NM FinFET的3σ不准确为+ 0.64%
机译:在16NM技术中使用FinFET和CMOS的8T SRAM单元的设计与性能评估
机译:一个0.0016 mm2 0.64 nJ基于泄漏的CMOS温度传感器
机译:具有集成电压参考分支的功率和区域高效的CMOS带隙参考电路