CMOS digital integrated circuits; clock and data recovery circuits; integrated optoelectronics; jitter; low-power electronics; optical receivers; CMOS process; IEEE 802.3ba; LA; LC quadrature digitally controlled oscillator; LC-QDCO; TIA; all-digital CDR; all-digital clock and data recovery; bit rate 25 Gbit/s; bit rate 26.5 Gbit/s; half-rate ADCDR; inverter-based amplifier; limiting amplifier; low power consumption; optical receiver; power 254 mW; quadrature sampling; receiver sensitivity; recovered clock jitter; size 65 nm; time 1.28 ps; tolerance mask; transimpedance amplifier; CMOS integrated circuits; Clocks; Optical amplifiers; Optical receivers; Oscillators; Semiconductor device measurement; LC oscillator; all-digital clock and data recovery (ADCDR); optical; quadrature digitally controlled oscillator (QDCO); receiver; transimpedance amplifier (TIA);
机译:具有65nm CMOS工艺的全数字时钟和数据恢复功能的22至26.5 Gb / s光接收器
机译:一款功能强大的能源/区域高效前向时钟接收器,具有全数字时钟和28nm CMOS数据恢复功能,可用于高密度互连
机译:利用混合模拟/数字环路滤波器和全数字无参考频率采集的2.5 Gb / s多速率0.25-μmCMOS时钟和数据恢复电路
机译:具有65nm CMOS过程中的全数字时钟和数据恢复的26.5 GB / S光接收器
机译:基于1-16 GB / S的全数字阶段内插器的时钟和数据恢复电路及深亚微米CMOS晶体管在低温温度下的可靠性研究
机译:用于空间光通信的CMOS光脉冲接收器单元阵列的设计与实现
机译:10 Gb / s CMOS串行链路接收器的均衡以及时钟和数据恢复技术