首页> 外文会议>Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE International >Transient-induced latchup in CMOS technology: physical mechanism and device simulation
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Transient-induced latchup in CMOS technology: physical mechanism and device simulation

机译:CMOS技术中的瞬态感应闩锁:物理机制和设备仿真

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摘要

The physical mechanism of transient-induced latchup (TLU) in CMOS ICs has been clearly characterized by device simulation and experimental verification in time domain perspective. An underdamped sine-wave-like voltage has been clarified as the real TLU-triggering stimulus under system-level electrostatic discharge (ESD) test. The specific "sweep-back" current caused by the minority carriers stored within the pnpn structure of CMOS ICs has been qualitatively proved to be the major cause of TLU.
机译:CMOS IC中瞬态感应闩锁(TLU)的物理机制已通过器件仿真和时域角度的实验验证得到了清晰的表征。在系统级静电放电(ESD)测试中,已将欠阻尼的正弦波状电压澄清为真正的TLU触发刺激。定性地证明了由存储在CMOS IC pnpn结构中的少数载流子引起的特定“回扫”电流。

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