Low Power and Highly Reliable 8-Bit Carry Select Adder

摘要

In today's enhanced technological advancements, a carry select adder performs an indispensable integral part of the complex processing of data. It exhibits promising results in minimizing cost and power consumption. The logic operation of it has simulated over 90 nm CMOS technology of spice tool at 0.8 V. These works present a Carry select adder using multiplier and adder circuits. In proposed designs, extra circuitry is eliminated and leads to a reduction in 43.995% of power consumption, 93.912% of time delay, and 97.515% of energy. The transistor count of the proposed carry select adder is 61.788% less than that of the conventional carry select adder. The power, delay, energy of it has been compared with state-of-art carry select adder. This advanced circuit of adder shows highly efficient and reliable performance.