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A study of dielectric breakdown of a half-bridge switching cell with substrate integrated 650V GaN dies

机译:具有衬底集成650V GaN裸片的半桥开关单元的介电击穿研究

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This paper proposes an ultra-low inductance half-bridge switching cell with substrate integrated 650V GaN bare dies. A vertical parallel-plate waveguide structure with 100 µm layer thickness results in a commutation loop inductance of 0.5 nH resulting in a negligible drain-source voltage overshoot in the inductive load standard pulse test. On the other hand reliable circuit operation requires an assessment of the isolation strength of the thin dielectric layer in the main commutation loop, because critical high local electric fields might occur between the pads. Measurements of the dielectric breakdown voltage followed by a statistical failure analysis provide a characteristic life of 14.7 kV and a 10% quantile of 13.5kV in the Weibull fitted data. This characteristic life depends strongly on the ambient temperature and drops to 4.1kV at 125°C. Additionally, ageing tests show an increasing in dielectric breakdown voltage after 500h, 1000h and 2000h at 125°C high-temperature storage due to resin densification processes.
机译:本文提出了一种具有衬底集成650V GaN裸芯片的超低电感半桥开关单元。垂直平行板波导结构的层厚度为100 µm,导致换向环路电感为0.5 nH,在电感负载标准脉冲测试中漏源电压过冲可忽略不计。另一方面,可靠的电路操作需要评估主换向回路中薄电介质层的隔离强度,因为在焊盘之间可能会出现临界的高局部电场。在Weibull拟合数据中,测量介电击穿电压,然后进行统计故障分析,可提供14.7 kV的特征寿命和13.5kV的10%分位数。该特性寿命在很大程度上取决于环境温度,在125°C时降至4.1kV。另外,老化测试表明,由于树脂致密化工艺,在125°C高温存储下500h,1000h和2000h之后,介电击穿电压增加。

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