This talk tracks the evolution of drop in chip power in recent CMOS technology nodes (relative to the previous node), with focus on high performance microprocessors. It argues that in the more recent nodes, the total chip power (energy-per-operation) has scaled much less than that of earlier CMOS nodes. If the present trends continue, it will spell challenge in continuing Moore's Law. Improving the chip power scaling in the future nodes is critical, especially as it relates to high performance microprocessors.
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